{"id":1615,"date":"2010-07-09T05:33:00","date_gmt":"2010-07-09T05:33:00","guid":{"rendered":"http:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/"},"modified":"2017-11-01T02:25:29","modified_gmt":"2017-11-01T02:25:29","slug":"new-to-fpgas-logic-simulation","status":"publish","type":"post","link":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/","title":{"rendered":"New to FPGAs \/ logic simulation?"},"content":{"rendered":"

A Brief Plunify Simulation Tutorial<\/h3>\n

The following step-by-step guide to simulation is aimed at users new to Plunify or to FPGA design in general.<\/p>\n

After a design is described in Verilog \/ VHDL, usually the next step is to run a simulation in order to verify if the general functionality is correct. There are many types of simulations and simulators.<\/p>\n

Plunify can be used to simulate a Verilog \/ VHDL design, using the Icarus Verilog and GHDL simulators. The following example uses a simple counter in Verilog, provided by default when you register with us.<\/p>\n

<\/p>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
\n
\n<\/td>\n<\/tr>\n
<\/p>\n

First, log on at www.plunify.com<\/a>.<\/p>\n

<\/p>\n

The Project Manager's initial page appears.<\/p>\n

<\/a><\/p>\n

Your home directory and its contents are displayed on the left.<\/p>\n

<\/p>\n

Click <\/a> and navigate to \/Home\/Sample_Project\/Simulation\/Verilog\/counter\/<\/p>\n

<\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

Click the \"Simulate\" tab.<\/p>\n

<\/a><\/p>\n

Select \"Verilog (Icarus Verilog) as your simulator.<\/p>\n

<\/p>\n

Select your Verilog source files using the built-in file explorer.<\/p>\n

<\/a><\/p>\n

Click \"Next\".<\/p>\n

<\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

Click the \"Simulate\" button.<\/p>\n

<\/a><\/p>\n

(In this case, we don't have to specify a \"Commandfile\", which is a batch file that Icarus Verilog uses.)<\/p>\n

<\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

At this point, your simulation has started.<\/p>\n

<\/p>\n

Click \"Close\", followed by the \"Reports\" tab.<\/p>\n

<\/p>\n

Your simulation will be displayed under \"Pending Jobs\".<\/p>\n

<\/a><\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

When the simulation completes, its job entry vanishes from \"Pending Jobs\" and appear in \"Completed Jobs\".<\/p>\n

<\/p>\n

A blue notification message also pops out near the top.<\/p>\n

<\/a><\/p>\n

To view results, click the above message (You will also be sent a notification email).<\/p>\n

<\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

Click \"View\" beside your job entry in \"Completed Jobs\"<\/p>\n

<\/a><\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

Two, potentially three types of results exist:<\/p>\n

<\/a><\/p>\n

    \n
  1. Compilation<\/li>\n
  2. Run, and<\/li>\n
  3. Waveform (if enabled in source files)<\/li>\n<\/ol>\n

    Click \"View\" beside each result to examine them. These files can also be downloaded.<\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

To view a simulation waveform, click <\/a> beside the waveform file.<\/p>\n

The built-in waveform viewer pops up in a new tab \/ window.
<\/a><\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

Display relevant signals by selecting them and clicking the \"Display Waveform\" button.<\/p>\n

<\/a>
<\/a><\/p>\n

Use the scroll and zoom buttons to examine your waveform and debug your simulation.<\/p>\n

<\/td>\n<\/tr>\n

\n
\n<\/td>\n<\/tr>\n
\n

But of course, simulation is a repetitive process, at least until your design works.<\/p>\n

<\/p>\n

Make changes to your source files and upload them.<\/p>\n

<\/p>\n

Run the simulation again via the above steps, or use the <\/a> button.<\/p>\n

<\/td>\n<\/tr>\n<\/table>\n

<\/div>\n

This concludes our brief simulation tutorial.<\/p>\n

Feel free to try the other examples as well, which include the same Verilog counter but with an Icarus Verilog command file, and a VHDL adder example that uses the GHDL simulator.<\/p>\n

Questions \/ comments \/ kudos \/ hate mail can be sent to tellus@plunify.com<\/a><\/p>\n","protected":false},"excerpt":{"rendered":"

A Brief Plunify Simulation Tutorial The following step-by-step guide to simulation is aimed at users new to Plunify or to FPGA design in general. After a design is described in Verilog \/ VHDL, usually the next step is to run a simulation in order to verify if the general functionality is correct. There are many […]<\/p>\n","protected":false},"author":6,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spay_email":"","jetpack_publicize_message":"","jetpack_is_tweetstorm":false,"_links_to":"","_links_to_target":""},"categories":[205],"tags":[],"yoast_head":"\nNew to FPGAs \/ logic simulation? - Plunify Blog & Support<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"New to FPGAs \/ logic simulation? - Plunify Blog & Support\" \/>\n<meta property=\"og:description\" content=\"A Brief Plunify Simulation Tutorial The following step-by-step guide to simulation is aimed at users new to Plunify or to FPGA design in general. After a design is described in Verilog \/ VHDL, usually the next step is to run a simulation in order to verify if the general functionality is correct. There are many […]\" \/>\n<meta property=\"og:url\" content=\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/\" \/>\n<meta property=\"og:site_name\" content=\"Plunify Blog & Support\" \/>\n<meta property=\"article:published_time\" content=\"2010-07-09T05:33:00+00:00\" \/>\n<meta property=\"article:modified_time\" content=\"2017-11-01T02:25:29+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"Kirvy Teo\" \/>\n\t<meta name=\"twitter:label2\" content=\"Est. reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"2 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\/\/schema.org\",\"@graph\":[{\"@type\":\"Organization\",\"@id\":\"https:\/\/support.plunify.com\/en\/#organization\",\"name\":\"Plunify-Support\",\"url\":\"https:\/\/support.plunify.com\/en\/\",\"sameAs\":[],\"logo\":{\"@type\":\"ImageObject\",\"@id\":\"https:\/\/support.plunify.com\/en\/#logo\",\"inLanguage\":\"en-US\",\"url\":\"https:\/\/i1.wp.com\/support.plunify.com\/en\/wp-content\/uploads\/sites\/5\/2016\/05\/Plunify_Logo_Outline_TranspBG_sm.png?fit=600%2C159&ssl=1\",\"contentUrl\":\"https:\/\/i1.wp.com\/support.plunify.com\/en\/wp-content\/uploads\/sites\/5\/2016\/05\/Plunify_Logo_Outline_TranspBG_sm.png?fit=600%2C159&ssl=1\",\"width\":600,\"height\":159,\"caption\":\"Plunify-Support\"},\"image\":{\"@id\":\"https:\/\/support.plunify.com\/en\/#logo\"}},{\"@type\":\"WebSite\",\"@id\":\"https:\/\/support.plunify.com\/en\/#website\",\"url\":\"https:\/\/support.plunify.com\/en\/\",\"name\":\"Plunify Blog & Support\",\"description\":\"Everything you need to know about Plunify products\",\"publisher\":{\"@id\":\"https:\/\/support.plunify.com\/en\/#organization\"},\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\/\/support.plunify.com\/en\/?s={search_term_string}\"},\"query-input\":\"required name=search_term_string\"}],\"inLanguage\":\"en-US\"},{\"@type\":\"ImageObject\",\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#primaryimage\",\"inLanguage\":\"en-US\",\"url\":\"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png\",\"contentUrl\":\"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png\"},{\"@type\":\"WebPage\",\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#webpage\",\"url\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/\",\"name\":\"New to FPGAs \/ logic simulation? - Plunify Blog & Support\",\"isPartOf\":{\"@id\":\"https:\/\/support.plunify.com\/en\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#primaryimage\"},\"datePublished\":\"2010-07-09T05:33:00+00:00\",\"dateModified\":\"2017-11-01T02:25:29+00:00\",\"breadcrumb\":{\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#breadcrumb\"},\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/\"]}]},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\/\/support.plunify.com\/en\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"New to FPGAs \/ logic simulation?\"}]},{\"@type\":\"Article\",\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#article\",\"isPartOf\":{\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#webpage\"},\"author\":{\"@id\":\"https:\/\/support.plunify.com\/en\/#\/schema\/person\/e837e6c73fa6ac9d51563659f5703277\"},\"headline\":\"New to FPGAs \/ logic simulation?\",\"datePublished\":\"2010-07-09T05:33:00+00:00\",\"dateModified\":\"2017-11-01T02:25:29+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#webpage\"},\"wordCount\":409,\"commentCount\":0,\"publisher\":{\"@id\":\"https:\/\/support.plunify.com\/en\/#organization\"},\"image\":{\"@id\":\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#primaryimage\"},\"thumbnailUrl\":\"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png\",\"articleSection\":[\"General\"],\"inLanguage\":\"en-US\",\"potentialAction\":[{\"@type\":\"CommentAction\",\"name\":\"Comment\",\"target\":[\"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#respond\"]}]},{\"@type\":\"Person\",\"@id\":\"https:\/\/support.plunify.com\/en\/#\/schema\/person\/e837e6c73fa6ac9d51563659f5703277\",\"name\":\"Kirvy Teo\",\"image\":{\"@type\":\"ImageObject\",\"@id\":\"https:\/\/support.plunify.com\/en\/#personlogo\",\"inLanguage\":\"en-US\",\"url\":\"https:\/\/secure.gravatar.com\/avatar\/774c97d4bacda481b716e8168ce23aad?s=96&d=mm&r=g\",\"contentUrl\":\"https:\/\/secure.gravatar.com\/avatar\/774c97d4bacda481b716e8168ce23aad?s=96&d=mm&r=g\",\"caption\":\"Kirvy Teo\"},\"url\":\"https:\/\/support.plunify.com\/en\/author\/kirvy\/\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"New to FPGAs \/ logic simulation? - Plunify Blog & Support","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/","og_locale":"en_US","og_type":"article","og_title":"New to FPGAs \/ logic simulation? - Plunify Blog & Support","og_description":"A Brief Plunify Simulation Tutorial The following step-by-step guide to simulation is aimed at users new to Plunify or to FPGA design in general. After a design is described in Verilog \/ VHDL, usually the next step is to run a simulation in order to verify if the general functionality is correct. There are many […]","og_url":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/","og_site_name":"Plunify Blog & Support","article_published_time":"2010-07-09T05:33:00+00:00","article_modified_time":"2017-11-01T02:25:29+00:00","og_image":[{"url":"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png"}],"twitter_card":"summary_large_image","twitter_misc":{"Written by":"Kirvy Teo","Est. reading time":"2 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Organization","@id":"https:\/\/support.plunify.com\/en\/#organization","name":"Plunify-Support","url":"https:\/\/support.plunify.com\/en\/","sameAs":[],"logo":{"@type":"ImageObject","@id":"https:\/\/support.plunify.com\/en\/#logo","inLanguage":"en-US","url":"https:\/\/i1.wp.com\/support.plunify.com\/en\/wp-content\/uploads\/sites\/5\/2016\/05\/Plunify_Logo_Outline_TranspBG_sm.png?fit=600%2C159&ssl=1","contentUrl":"https:\/\/i1.wp.com\/support.plunify.com\/en\/wp-content\/uploads\/sites\/5\/2016\/05\/Plunify_Logo_Outline_TranspBG_sm.png?fit=600%2C159&ssl=1","width":600,"height":159,"caption":"Plunify-Support"},"image":{"@id":"https:\/\/support.plunify.com\/en\/#logo"}},{"@type":"WebSite","@id":"https:\/\/support.plunify.com\/en\/#website","url":"https:\/\/support.plunify.com\/en\/","name":"Plunify Blog & Support","description":"Everything you need to know about Plunify products","publisher":{"@id":"https:\/\/support.plunify.com\/en\/#organization"},"potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/support.plunify.com\/en\/?s={search_term_string}"},"query-input":"required name=search_term_string"}],"inLanguage":"en-US"},{"@type":"ImageObject","@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#primaryimage","inLanguage":"en-US","url":"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png","contentUrl":"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png"},{"@type":"WebPage","@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#webpage","url":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/","name":"New to FPGAs \/ logic simulation? - Plunify Blog & Support","isPartOf":{"@id":"https:\/\/support.plunify.com\/en\/#website"},"primaryImageOfPage":{"@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#primaryimage"},"datePublished":"2010-07-09T05:33:00+00:00","dateModified":"2017-11-01T02:25:29+00:00","breadcrumb":{"@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#breadcrumb"},"inLanguage":"en-US","potentialAction":[{"@type":"ReadAction","target":["https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/"]}]},{"@type":"BreadcrumbList","@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/support.plunify.com\/en\/"},{"@type":"ListItem","position":2,"name":"New to FPGAs \/ logic simulation?"}]},{"@type":"Article","@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#article","isPartOf":{"@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#webpage"},"author":{"@id":"https:\/\/support.plunify.com\/en\/#\/schema\/person\/e837e6c73fa6ac9d51563659f5703277"},"headline":"New to FPGAs \/ logic simulation?","datePublished":"2010-07-09T05:33:00+00:00","dateModified":"2017-11-01T02:25:29+00:00","mainEntityOfPage":{"@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#webpage"},"wordCount":409,"commentCount":0,"publisher":{"@id":"https:\/\/support.plunify.com\/en\/#organization"},"image":{"@id":"https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#primaryimage"},"thumbnailUrl":"https:\/\/4.bp.blogspot.com\/_9wZsv4HY9h0\/TDa48GIvtFI\/AAAAAAAAACQ\/oItsManlYy0\/s400\/Screen+shot+2010-07-09+at+1.42.47+PM.png","articleSection":["General"],"inLanguage":"en-US","potentialAction":[{"@type":"CommentAction","name":"Comment","target":["https:\/\/support.plunify.com\/en\/2010\/07\/09\/new-to-fpgas-logic-simulation\/#respond"]}]},{"@type":"Person","@id":"https:\/\/support.plunify.com\/en\/#\/schema\/person\/e837e6c73fa6ac9d51563659f5703277","name":"Kirvy Teo","image":{"@type":"ImageObject","@id":"https:\/\/support.plunify.com\/en\/#personlogo","inLanguage":"en-US","url":"https:\/\/secure.gravatar.com\/avatar\/774c97d4bacda481b716e8168ce23aad?s=96&d=mm&r=g","contentUrl":"https:\/\/secure.gravatar.com\/avatar\/774c97d4bacda481b716e8168ce23aad?s=96&d=mm&r=g","caption":"Kirvy Teo"},"url":"https:\/\/support.plunify.com\/en\/author\/kirvy\/"}]}},"jetpack_featured_media_url":"","jetpack_publicize_connections":[],"jetpack_sharing_enabled":true,"jetpack_shortlink":"https:\/\/wp.me\/p7XiEH-q3","_links":{"self":[{"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/posts\/1615"}],"collection":[{"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/users\/6"}],"replies":[{"embeddable":true,"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/comments?post=1615"}],"version-history":[{"count":2,"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/posts\/1615\/revisions"}],"predecessor-version":[{"id":2872,"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/posts\/1615\/revisions\/2872"}],"wp:attachment":[{"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/media?parent=1615"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/categories?post=1615"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/tags?post=1615"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}