{"id":1616,"date":"2010-07-01T02:02:00","date_gmt":"2010-07-01T02:02:00","guid":{"rendered":"http:\/\/support.plunify.com\/en\/2010\/07\/01\/from-dsps-in-fpgas-to-overall-trends-in-the-fpga-world\/"},"modified":"2017-11-01T02:25:52","modified_gmt":"2017-11-01T02:25:52","slug":"from-dsps-in-fpgas-to-overall-trends-in-the-fpga-world","status":"publish","type":"post","link":"https:\/\/support.plunify.com\/en\/2010\/07\/01\/from-dsps-in-fpgas-to-overall-trends-in-the-fpga-world\/","title":{"rendered":"From DSPs in FPGAs to overall trends in the FPGA world"},"content":{"rendered":"<p>Came across an interesting <a href=\"http:\/\/www.linkedin.com\/groupAnswers?viewQuestionAndAnswers=&amp;discussionID=22990278&amp;gid=54049&amp;trk=EML_anet_qa_ttle-0Ot79xs2RVr6JBpnsJt7dBpSBA\">discussion on a LinkedIn group<\/a> regarding first, DSPs in FPGAs, followed by observations on trends for future FPGAs.<br \/>Highlights:<\/p>\n<ul>\n<li>How to accelerate DSP applications in FPGAs so that ASIC implementations will fall behind<\/li>\n<li>Custom blocks in FPGAs and how they are positioned to capture more designs<\/li>\n<li>Motivations of FPGA makers for putting certain architectural features in future devices<\/li>\n<\/ul>\n<p>One poster mentioned that FPGA makers are not so keen on promoting embedded blocks in FPGAs because doing so devalues the programmable side of the technology--the FPGA fabric.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>Came across an interesting discussion on a LinkedIn group regarding first, DSPs in FPGAs, followed by observations on trends for future FPGAs.Highlights: How to accelerate DSP applications in FPGAs so that ASIC implementations will fall behind Custom blocks in FPGAs and how they are positioned to capture more designs Motivations of FPGA makers for putting [&hellip;]<\/p>\n","protected":false},"author":6,"featured_media":0,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spay_email":"","jetpack_publicize_message":"","jetpack_is_tweetstorm":false,"_links_to":"","_links_to_target":""},"categories":[205],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v17.0 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>From DSPs in FPGAs to overall trends in the FPGA world - Plunify Blog &amp; Support<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/support.plunify.com\/en\/2010\/07\/01\/from-dsps-in-fpgas-to-overall-trends-in-the-fpga-world\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"From DSPs in FPGAs to overall trends in the FPGA world - Plunify Blog &amp; Support\" \/>\n<meta property=\"og:description\" content=\"Came across an interesting discussion on a LinkedIn group regarding first, DSPs in FPGAs, followed by observations on trends for future FPGAs.Highlights: How to accelerate DSP applications in FPGAs so that ASIC implementations will fall behind Custom blocks in FPGAs and how they are positioned to capture more designs Motivations of FPGA makers for putting [&hellip;]\" \/>\n<meta property=\"og:url\" content=\"https:\/\/support.plunify.com\/en\/2010\/07\/01\/from-dsps-in-fpgas-to-overall-trends-in-the-fpga-world\/\" \/>\n<meta property=\"og:site_name\" content=\"Plunify Blog &amp; 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