{"id":2787,"date":"2017-10-31T04:50:44","date_gmt":"2017-10-31T04:50:44","guid":{"rendered":"https:\/\/support.plunify.com\/en\/?p=2787"},"modified":"2018-08-21T16:07:36","modified_gmt":"2018-08-21T16:07:36","slug":"quartus-comparison","status":"publish","type":"post","link":"https:\/\/support.plunify.com\/en\/2017\/10\/31\/quartus-comparison\/","title":{"rendered":"Intel FPGA Toolchain Comparison: Quartus 16.1 VS 17.0"},"content":{"rendered":"<h2>So, as an Intel FPGA user, I have\u00a0an Arria 10 design. Should I upgrade to Quartus 17.0?<\/h2>\n<p>To answer this question, we used\u00a0<a href=\"http:\/\/www.plunify.com\/en\/product\/\" target=\"_blank\">InTime<\/a> tool to run through 60 different synthesis and place-and-route parameter configurations were generated by our Default recipe.<\/p>\n<h2>Method<\/h2>\n<p>We used an Arria 10 design (Device: 10AX115U3F45E2SGE3) for the experiment. The test was conducted as follows:<\/p>\n<ol>\n<li>InTime generates compilation settings for Quartus 16.1, specifically 60 compilations which were ran for two rounds of 30 runs each.<\/li>\n<li>Use Quartus 17.0 to compile the exact same 60 compilation configurations.<\/li>\n<\/ol>\n<p>InTime\u2019s Default recipe learns from past results and generates parameters to optimize a design for timing and\/or area performance. Therefore, we ran two rounds to make use of the learning process in InTime to optimize towards better results. In doing so, we can also determine if InTime is capable of generating compilation settings suitable for both Quartus 16.1 and Quartus 17.0.<\/p>\n<h2>Results<\/h2>\n<p>The results are shown in the table and figures below -- in terms of the Total Negative Slack (TNS), Worst Slack and other compilation results. At a first glance, the results for both Quartus 16.1 and Quartus 17.0 seemed to be similar.<\/p>\n<p><img loading=\"lazy\" class=\"aligncenter wp-image-2791\" title=\"Intel FPGA Toolchain Comparison 1\" src=\"https:\/\/i0.wp.com\/support.plunify.com\/en\/wp-content\/uploads\/sites\/5\/2017\/10\/Vivado_Comparision1.jpg?resize=700%2C468&#038;ssl=1\" alt=\"Intel FPGA Toolchain Comparison 1\" width=\"700\" height=\"468\" data-recalc-dims=\"1\" \/><br \/>\nHowever, if you start zooming into the good results, you start seeing more variations for both TNS and Worst Slack.<\/p>\n<p><img loading=\"lazy\" class=\"aligncenter wp-image-2792\" title=\"Intel FPGA Toolchain Comparison 2\" src=\"https:\/\/i2.wp.com\/support.plunify.com\/en\/wp-content\/uploads\/sites\/5\/2017\/10\/Vivado_Comparision2.jpg?resize=700%2C468&#038;ssl=1\" alt=\"Intel FPGA Toolchain Comparison 2\" width=\"700\" height=\"468\" data-recalc-dims=\"1\" \/><\/p>\n<p><img loading=\"lazy\" class=\"aligncenter wp-image-2793\" title=\"Intel FPGA Toolchain Comparison 3\" src=\"https:\/\/i0.wp.com\/support.plunify.com\/en\/wp-content\/uploads\/sites\/5\/2017\/10\/Vivado_Comparision3.jpg?resize=700%2C468&#038;ssl=1\" alt=\"Intel FPGA Toolchain Comparison 3\" width=\"700\" height=\"468\" data-recalc-dims=\"1\" \/><\/p>\n<p>And if you count the better results from each tool, it shows that Quartus 17.0 has an edge in terms of overall number of results that perform better.<\/p>\n<table style=\"height: 143px\" width=\"1031\">\n<tbody>\n<tr>\n<td style=\"text-align: center\" width=\"101\"><\/td>\n<td style=\"text-align: center\" width=\"255\"><strong>Number of results<br \/>\nwhere TNS is better (Quartus 16.1)<\/strong><\/td>\n<td style=\"text-align: center\" width=\"267\"><strong>Number of results<br \/>\nwhere TNS is better (Quartus 17.0)<\/strong><\/td>\n<\/tr>\n<tr>\n<td style=\"text-align: center\" width=\"101\"><strong>TNS <\/strong><\/td>\n<td style=\"text-align: center\" width=\"255\">28 (47%)<\/td>\n<td style=\"text-align: center\" width=\"267\"><span style=\"color: #339966\"><strong>31 (53%)<\/strong><\/span><\/td>\n<\/tr>\n<tr>\n<td style=\"text-align: center\" width=\"101\"><strong>Worst Slack<\/strong><\/td>\n<td style=\"text-align: center\" width=\"255\">25 (42%)<\/td>\n<td style=\"text-align: center\" width=\"267\"><span style=\"color: #339966\"><strong>34 (58%)<\/strong><\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>Both toolchains managed to obtain 0ns TNS and 0.01ns Worst Slack for the same design. Quartus 17.0 has a larger distribution and variance for TNS but smaller distribution for Worst Slack.<\/p>\n<table style=\"height: 288px\" width=\"1029\">\n<tbody>\n<tr>\n<td width=\"63\"><\/td>\n<td width=\"76\">\n<p style=\"text-align: center\"><strong>Best TNS (ns)<\/strong><\/p>\n<\/td>\n<td style=\"text-align: center\" width=\"85\"><strong>Worst TNS (ns)<\/strong><\/td>\n<td style=\"text-align: center\" width=\"94\"><strong>TNS Distribution (ns)<\/strong><\/td>\n<td style=\"text-align: center\" width=\"95\"><strong>Best \u201cWorst Slack\u201d (ns)<\/strong><\/td>\n<td style=\"text-align: center\" width=\"113\"><strong>Worst\u00a0 \u201cWorst Slack\u201d (ns)<\/strong><\/td>\n<td style=\"text-align: center\" width=\"93\"><strong>Worst Slack Distribution (ns)<\/strong><\/td>\n<\/tr>\n<tr>\n<td style=\"text-align: center\" width=\"63\">Quartus 16.1<\/td>\n<td style=\"text-align: center\" width=\"76\">0.00<\/td>\n<td style=\"text-align: center\" width=\"85\">-2628.04<\/td>\n<td style=\"text-align: center\" width=\"94\">-369.40 \u00b1 602.91<\/td>\n<td style=\"text-align: center\" width=\"95\">0.01<\/td>\n<td style=\"text-align: center\" width=\"113\">-1.09<\/td>\n<td style=\"text-align: center\" width=\"93\">-0.40 \u00b1 0.33<\/td>\n<\/tr>\n<tr>\n<td style=\"text-align: center\" width=\"63\">Quartus 17.0<\/td>\n<td style=\"text-align: center\" width=\"76\">0.00<\/td>\n<td style=\"text-align: center\" width=\"85\">-5869.33<\/td>\n<td style=\"text-align: center\" width=\"94\">-406.38 \u00b1 866.35<\/td>\n<td style=\"text-align: center\" width=\"95\">0.01<\/td>\n<td style=\"text-align: center\" width=\"113\">-1.26<\/td>\n<td style=\"text-align: center\" width=\"93\">-0.38 \u00b1 0.31<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h4>So, how did the default compilation settings perform?<\/h4>\n<p>The last question that is on everyone\u2019s mind is how did the default settings perform? This is assuming that I am using only the default settings in both Quartus 16.1 and 17.0.<\/p>\n<p>Quartus 17.0 is a clear winner!<\/p>\n<table width=\"618\">\n<tbody>\n<tr>\n<td width=\"151\"><\/td>\n<td style=\"text-align: center\" width=\"187\"><strong>Best TNS (ns)<\/strong><\/td>\n<td style=\"text-align: center\" width=\"280\"><strong>Best \u201cWorst Slack\u201d (ns)<\/strong><\/td>\n<\/tr>\n<tr>\n<td style=\"text-align: center\" width=\"151\">Quartus 16.1<\/td>\n<td style=\"text-align: center\" width=\"187\">-82.715<\/td>\n<td style=\"text-align: center\" width=\"280\">-0.302<\/td>\n<\/tr>\n<tr>\n<td style=\"text-align: center\" width=\"151\">Quartus 17.0<\/td>\n<td style=\"text-align: center\" width=\"187\">-2.095<\/td>\n<td style=\"text-align: center\" width=\"280\">-0.189<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p>(Shameless plug: Worry not if you don\u2019t get <span style=\"text-decoration: underline\">40x<\/span> improvements in TNS on Quartus 17.0. You can always use InTime to find better settings!)<\/p>\n<h2>Conclusion<\/h2>\n<p>In summary, a total of 60 configurations were generated and compiled by both Quartus 16.1.0 and Quartus 17.0. The results suggest that the performance of Quartus 17.0 is better than Quartus 16.1.<\/p>\n<h2><strong><span style=\"color: #339966\">So yeah, upgrade your\u00a0Intel FPGA tools!<\/span><\/strong><\/h2>\n<p>Disclaimer: Due to the immense exploration space available, 60 parameter configurations on a single design make up a single, non-representative data set. Splitting the compilations over multiple rounds helps to inject feedback and reinforcement into our learning process. In the interest of brevity, our experiment is intended to give a glimpse of the differences between the different tool versions.<\/p>\n<hr \/>\n<p>Similar Article :<br \/>\n<a href=\"https:\/\/support.plunify.com\/en\/2017\/05\/31\/xilinx-fpga-comparison\">Xilinx FPGA Toolchain Comparison: Vivado 2016.4 VS Vivado 2017.1<\/a><\/p>\n<h3>Join Plunify Newsletter<\/h3>\n<div class=\"jetpack_subscription_widget\"><h2 class=\"widgettitle\"><\/h2>\n            <form action=\"#\" method=\"post\" accept-charset=\"utf-8\" id=\"subscribe-blog-538\">\n\t\t\t\t                    <div id=\"subscribe-text\"><p>Enter your email address and have the latest insights on FPGA, cloud and Machine Learning delivered straight to your inbox.<\/p>\n<\/div>                    <p id=\"subscribe-email\">\n                        <label id=\"jetpack-subscribe-label\"\n                               class=\"screen-reader-text\"\n                               for=\"subscribe-field-538\">\n\t\t\t\t\t\t\tEmail Address                        <\/label>\n                        <input type=\"email\" name=\"email\" required=\"required\"\n                        \t\t\t                                                value=\"\"\n                            id=\"subscribe-field-538\"\n                            placeholder=\"Email Address\"\n                        \/>\n                    <\/p>\n\n\t\t\t\t\t<p id=\"subscribe-submit\"\n\t\t\t\t\t\t\t\t\t\t\t>\n                        <input type=\"hidden\" name=\"action\" value=\"subscribe\"\/>\n                        <input type=\"hidden\" name=\"source\" value=\"https:\/\/support.plunify.com\/en\/wp-json\/wp\/v2\/posts\/2787\"\/>\n                        <input type=\"hidden\" name=\"sub-type\" value=\"widget\"\/>\n                        <input type=\"hidden\" name=\"redirect_fragment\" value=\"538\"\/>\n\t\t\t\t\t\t                        <button type=\"submit\"\n\t                        \t\t                    \t\t\t                    style=\"margin-left: 0px;\"\n\t\t                    \t                        name=\"jetpack_subscriptions_widget\"\n\t                    >\n\t                                    Sign Me Up!                                  <\/button>\n                    <\/p>\n\t\t\t\t            <\/form>\n\t\t\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>So, as an Intel FPGA user, I have\u00a0an Arria 10 design. Should I upgrade to Quartus 17.0? To answer this question, we used\u00a0InTime tool to run through 60 different synthesis and place-and-route parameter configurations were generated by our Default recipe. Method We used an Arria 10 design (Device: 10AX115U3F45E2SGE3) for the experiment. The test was [&hellip;]<\/p>\n","protected":false},"author":6,"featured_media":2678,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"spay_email":"","jetpack_publicize_message":"","jetpack_is_tweetstorm":false,"_links_to":"","_links_to_target":""},"categories":[206],"tags":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v17.0 - https:\/\/yoast.com\/wordpress\/plugins\/seo\/ -->\n<title>Intel FPGA Toolchain Comparison: Quartus 16.1 VS 17.0<\/title>\n<meta name=\"description\" content=\"This Intel FPGA review explains how good the new Quartus 17.0 is compared to Quartus 16.1, and advises you whether you should upgrade to this new tool.\" \/>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/support.plunify.com\/en\/2017\/10\/31\/quartus-comparison\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" 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