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For those who know our history, Plunify was born in the cloud. Our very first prototype of InTime was developed, executed and tested on Amazon Web Services. During those days, we only had to contend with EC2, EBS and S3. We even had to implement AES encryption in S3 ourselves (nowadays it is a checkbox!). […]

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InTime version 1.5.11 is officially launched today. We haven’t been describing our last few releases as we have been fine-tuning them based on customers’ requirements. Today, we are proud to finally announce these improvements! “Deep Dive” recipe This recipe was born out of the differences in the results between InTime’s “Default” recipe and its “Placement Seed […]

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Oh! The paint hasn’t dried on my Vivado 2016.1 blogpost and 2016.2 is already out! The early months of 2016 saw the release of Vivado 2016.1. We naturally assumed that it would be better than the previous version, given what we heard from beta users and developers. In many cases, users usually base their opinions […]

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Altera FPGA users need no introduction to Partition Merge, a step in the Altera Quartus-II (“Quartus”) design compilation process that combines multiple netlists (post-synthesis or post-fit) into a single, complete netlist. Quartus triggers this step automatically whenever it detects any design partitions in a project. Will Quartus always run Partition Merge? If not, why?Quartus tries […]

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In this edition we have some exciting updates about our new office in East Singapore, new Sales Reps onboard, an exciting investment announcement and last but not least, the upcoming release of InTime version 1.4.4. Plunify opens new headquarters in eastern Singapore Plunify appoints new reps in Beijing and Israel New InTime software version 1.4.4 […]

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An evaluation customer made an interesting comment recently. Due to the rigorous nature of InTime’s approach, we’d often get comments like, “You mean this takes 100 compilations more than usual?!” This time it was, “I need to evaluate InTime more as it met timing too quickly.” It felt like a compliment hidden within a complaint, […]

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One of the questions that FPGA designers wonder and sometimes even argue about, is: Should the implementation tools focus on Worst Slack (WS) or Total Negative Slack (TNS)? FPGA tools typically devote more attention to WS, but there are tradeoffs. If WS is small yet many paths fail timing, then TNS can be huge. Similarly, […]

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http://eecatalog.com/chipdesign/2015/02/04/the-coming-year-in-eda-what-will-shape-2015/ Hamhua Ng, CEO of Plunify said: “There is much truth in the saying, ‘Those who don’t learn from history are doomed to repeat it,’ especially in the data-driven world that we live in today. It seems like every retailer, social network and financial institution is analyzing and finding patterns in the data that we […]

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EDA Past, Present, and Future with Lucio Lanza.Another amazing interview from one of our investors. http://www.eejournal.com/archives/articles/20141219-fishfry/

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Last month we released InTime v1.2, and we’ve been pushing out a number of incremental updates ever since. While the past few versions have been all about introducing new kick-ass features into InTime, this time we focused on working out the kinks. Here are the highlights of this version. New “Seeded Effort Level Exploration” Recipe Like […]

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