While LogicLock assignments enable users to constrain their Quartus designs' placement locations as part of floor-planning, at Plunify we've always been thinking about intelligently doing targeted LogicLock adjustments to improve design performance. This idea has now been implemented into a new recipe in InTime 1.6.0 called Auto Placement.
The new Auto Placement recipe performs automatic placement adjustments to improve timing. InTime first analyses the locations of failing timing paths, and re-locates them based on what the tool learns about the design's characteristics, without changing any source code.
The figure below shows the chip view of the implemented design, before and after Auto Placement:
Noticeable placement differences
prior to (left) and after (right) running Auto Placement
Intrigued by what you are seeing? Here is how to use Auto Placement for a Quartus-II or Quartus Prime Std Edition project:
- Open your project in InTime.
- From the Recipe dropdown, click and select the Auto Placement recipe.
- Specify the number of different results you want in the "Runs per Round" flow property (10 in this example).
- Click "Start Recipe" to start running.
Here is a more detailed example of a design ran using Auto Placement.
The design was first compiled using the InTime Default recipe, followed by the Auto Placement recipe. This is one possible recipe combination where Auto Placement can be used with other recipes. The first round runs InTime Default to find the optimised set of compiler settings for timing performance while the second round further optimises timing using Auto Placement based on the optimal compiler settings found in the first round. Notice that the Total Negative Slack(TNS) improves by 8.904ns from the best first round's TNS of -17.369ns, to an overall best of -8.465ns.
As randomness is involved, not all results generated via the Auto Placement recipe will be good, but it is a painless approach with no impact on functionality -- certainly something worth trying.